MinJun Choi | Study

컴퓨터구조

0. Intro

0-2. CA Overview

1. Computer Abstractions and Technology

1-1. Defining Performance

1-2. Measuring Performance

2. Instructions: Language of the Computer

2-1. Design principles 1~3 of MIPS ISA

2-2. Design principles 4 of MIPS ISA

2-3. Representing Instructions in computer

2-4. Supporting procedures in computer HW

2-5. MIPS memory allocation & addressing

3. Arithmetic for Computers

3-1. Addition and Subtraction

3-2. Multiplication

4. The Processor

4-1. Processor Overview

4-2. Controlling a datapath

4-3. A single-cycle datapath

4-4. Pipelining overview

4-5. Handling hazards

4-6. Exceptions

5. Memory Hierarchy

5-1. Cache overview

5-2. Improving cache performance

5-3. Virtual memory Part 1

5-4. Virtual memory Part 2

4. The Processor > 4-2. Controlling a datapath

Controlling a datapath

Updated at 2022.10.14

Controlling a datapath

main control

Control signals are derived from given instructions

rs is always being read
rt is being read except when the instruction is lw.
- It is for loading

ALU control

Load / store instructions: add
Branch instructions: subtract
R-format instructions: depends on a function field in the instructions

Main Control Unit determines the ALUOp value
Whatever the funct codes are, if the opcode is lw, sw, or beq, ALU fuction is determined automatically

4-1. Processor Overview

4-3. A single-cycle datapath