Single-cyle datapath

Whole structure of Processor
Signal with controller
A single-cycle datapath executes instructions in one clock cycle with a clocking methodology.
We will study how this works according to instructions

R-format

R-format

• don't need to access memory
  • MemRead = 0
  • MemtoReg = 0
  • MemWrite = 0
• have to update value of rd register
  • RegDst = 1
  • RegWrite = 1
• PC just have to be updated +4
  • branch = 0
• ALU control determines the arithmetic type according to ALUOp and func code of instruction

Load

Load

• need to access memory and read data
  • MemRead = 1
  • MemtoReg = 1
  • MemWrite = 0
• have to get value from memory to rs field (destination)
  • RegDst = 0 (rs to destination)
  • RegWrite = 1
• PC just have to be updated +4
  • branch = 0
• ALU control determines the arithmetic type according to ALUOp
• offset is extended from 16-bit to 32-bit by Sign-extend unit and added with Read data 1 (base addr)

Branch-on-equal

Branch-on-equal

• don't need to access memory
  • MemRead = 0
  • MemtoReg = 0
  • MemWrite = 0
• Calculate target address
  • extend the offset to 32 bit and shift left twice (multiply 4)
  • add with PC + 4
• RegDst doesn't matter

More about: jump

Jump

• Calculate target address
  • offset is extended to 28-bit
  • concatenate with 0000
• Jump signal = 1